Computer Engineering

Justification
Graduate students in Data Science and Artificial Intelligence will work in the development and knowledge of computers from the most used strategies to those of the latest generation. This knowledge involves the development of multiprocessor systems and the management of shared resources among them; memory hierarchy management for systems with explicit and implicit parallelism, process management and data management.

In this course, students will acquire the necessary skills for the knowledge of the architectures that constitute today's advanced processors, cache memory structures, multicore processors and parallelism, in order to understand and be able to propose processing architectures based on CPUs and GPUs.

This course contributes to the development of the following specific competence of the grade (CE-FB-07):

- Apply the principles of storing, computing and managing information to design distributed an efficient solutions applied to data science and artificial intelligence.

And also to develop the following generic competence CG6:

- Balance time upon priorities, considering short, medium and long term objectives, and the interested personal and professional areas.

Subject competencies
- CE1: Identify, describe and functionally analyze the fundamental components of a computer, classifying the existing architectures and the different strategies for managing the architecture of a computer system.

- CE2: Solve and implement solutions to concurrent problems as sets of interrelated processes using specification and concurrent programming tools.

- CG6: Balance time upon priorities, considering short, medium and long term objectives, and the interested personal and professional areas.

Course content
UNIT 1. Introduction and basic concepts.

UNIT 2. ISA and Microarchitectures. Instructions, Registers, ALU and Buses. The PILA and the Interrupts The control unit (Control of elementary operations. Control signals. Phases of an instruction. Input/output management. Storage management. Storage schemes: organizations and management strategies. Performance.

UNIT 3. Computing Paradigms. Advanced Processor Architecture. Internal architecture of a scalar processor. Call gates. Protection mechanisms. Task switching. Interrupts. General concepts. Gustafson's Law. Flynn Taxonomy. Massive parallelism. CPU/GPU processing. Process model. Interaction: communication and synchronization. Scheduling. Interlocking. Performance.

UNIT 4. Memory and hierarchies. Need for cache. Memory management and organization. Segmented and paged virtual memory management. Caches in multiprocessor systems. Cache coherence protocols for parallel systems.

UNIT 5. Parallel processors. MIMD connected to a single Bus. Networked MIMD. Applications of parallel processing. Future of parallel processors.

EVALUATION SYSTEM

Final mark = CE1 (50%) + CE2 (40%) + CG6 (10%)

CE1 will be evaluated during the course by means of practical exercises (10%) and a partial evaluation test (40%). CE2 will be evaluated by means of a final evaluation test (40%). CG6 will be evaluated considering the management of the practical excercises (10%).

In the final exam of the ordinary call, 75% of the grade corresponding to the continuous evaluation test can be recovered (the other 25% will correspond to the grade obtained in that preliminary test).